Eurotech ED-C3 02 Spezifikationen Seite 47

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Seitenansicht 46
BIOS Setup
47
DPD5MAN101
8.2.8. South Bridge Configuration
Table 15. South Bridge Configuration Setting
Setting
Contents
HPET Support
Set HPET (High Precision Event Timer).When enabled,
corresponding enable bit will be set by RSDT point HPET
table.
Disabled
Enabled (Default)
HPET Memory Map BAR
Select HPET memory map BAR address.
FED00000 (Default)
FED01000
FED02000
FED03000
State After G3
Set the state which will be moved when power is back after G3
state.
State S5 (Default)
State S0
Native PCI Express
Set Native PCI Express.
Disabled (Default)
Enabled
8.2.8.1. SB PCI Express Configuration
Table 16. SB PCI Express Configuration Setting
Setting
Contents
PCI Express Root Port Clock Gating
Set PCI Express Root Port Clock Gating.
Disabled
Enabled (Default)
DMI Link ASPM Control
Set DMI link ASPM (Active State Power Management).
Disabled (Default)
L0S
L1
L0S or L1
Auto
DMI Link Extended Sync Control
Control of DMI link extension synchronous.
Disabled (Default)
Enabled
DMI Link Extended Sync Control
Control of DMI link extension synchronous.
Disabled (Default)
Enabled
PCIe-USB Glitch W/
A
Work Around to abnormal signal of PCIe-USB by fault device
connected to the behind of PCIE/PEG port.
Disabled (Default)
Enabled
PEG ASPM
Set PEG ASPM.
Disabled (Default)
L0s
L1
L0s and L1
Auto
De-emphasis Control
Set PEG De-emphasis value.
-6 dB (Default)
-3.5 dB
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