
Hardware Specifications
13
DPD5MAN101
3.1.5.2. Status Register (offset:0001h)
This register shows the logic of SPD Write Protect signal and input signal from carrier board.
Table 5. Status Register
bit
Name Meaning Initial Value Access
7..4
RSVD
RSVD
000000
RO
3
BIOS_DISABLE#
Request signal from carrier board
-
RO
2
THRM#
1:Temperature sensor on carrier board shows a
normal value
0:Temperature sensor on carrier board is shows
an abnormal value
-
RO
1
BATLOW#
1:battery voltage on carrier board is a normal value
0:battery voltage on carrier board is an abnormal
value
-
RO
0
SPD_WP
WP of EEPROM for SPD
Write 0 when rewriting software
1
R/W
3.1.5.3. Thermal Monitor Select Register (offset:0002h)
This register selects a thermal monitor connected to the CPLD that is being read out.
Table 6. Thermal status register
bit
Name Meaning Initial Value Access
7..2
RSVD
RSVD
000000
RO
1..0
THRM_MONI_SEL
Thermal monitor temperature selected from the
following options can be read out by thermal
monitor register (offset:0003h).
11:RSVD
10:GBE_THRM (ambient temperature of
GbE(82579))
01:DDR3B_THRM (ambient temperature of
DDR3(solder side))
00:DDR3A_THRM (ambient temperature of DDR3
(component side))
00
R/W
3.1.5.4. Thermal Monitor Register (offset:0003h)
This register displays temperature value read out by the thermal monitor.
Table 7. Thermal Monitor Register
bit
Name Meaning Initial Value Access
7..0
THRM
Displays the temperature value read out from the
thermal monitor selected by THRM_MONI_SEL
(0 to 255℃, 1℃/LSB)
00000000
RO
3.2. Memory
CPU-71-15 memory is shown below.
3.2.1. Main Memory
The main memory of CPU-71-15 is DDR3-1333 SDRAM. 4 GB capacity comes standard off-the-shelf
but optional versions with 1GB, 2GB, or 8GB can be specially ordered.
It supports ECC, automatically corrects 1-bit error, and also detects 2-bit errors.
3.2.2. Boot ROM
This is a SPI-FLASH memory directly-mounted on CPU-71-15 with 8MB of capacity.
It stores UEFI (functionally, the “BIOS”) code and configuration data.
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